In the chip-embedding packaging technology, e.g. for power modules, the chip is embedded with a laminate after the chip has been mounted onto the substrate (“Die Attach”) and the Source-and-Gate-Contact at the chip front side is opened by means of a laser and is subsequently filled galvanically.
In order to achieve a better adhesion of the laminate to the copper substrate, the copper substrate is usually roughened or textured before lamination by means of a wet-chemical process. In that case, the etch chemistry should be set such that the chip connection material, e.g. the diffusion solder or the conducting adhesive, does not dissolve. Furthermore, the active front side of the chip should not be damaged by means of the texturing process. The adhesion between the chip carrier material and the laminate should stand the stress load, which occurs e.g. at the temperature-cycles, the high temperature, storing and wet-storing.
One approach of roughening or texturing process is to use different chemicals, inter alia by means of strong-etching sulphur acids as well as hydrogen peroxide etc (which is unknown organics). In this approach, the substrate with the mounted components is given into the bath of the above mentioned chemicals at a specific temperature and for a pre-determined time period.
However, complex bath processing with concentration and temperature variations is required in the conventional processes, which may also cause variations in the roughness and thus in the adhesion of the laminate to the substrate. The organic components of the supplier companies are unknown, and the effect of the residual products is unknown. Setting of the processes to corresponding substrate surface and leadframe plating is required. In addition, there is a risk of under-etching of the regions between chip and substrate. In etching of the chip pad-copper-metallization, higher costs are incurred due to the required thicker copper layer on the chip pads. Etching away of the aluminum chip rear side metallization at the open edges is needed, and thus adhesion problems of the chip rear side metallization, in particular, after stress load exist (etch medium residuals in the etched gap cause local element with electro-chemical corrosion in the humidity test). Further, there is limitation with respect to the selection of chip adhesives.
In chip packages, delamination may occur between mold compound and the chip carrier, e.g., between mold compound and the leadframe on the chip carrier. One approach is to use adhesion promoter, such as A2, moldPrep and uPPF, to enhance the adhesion between mold compound and the leadframe. However, these adhesion promoter may cause poor wire bondability and high cost, wherein contamination of the adhesion promoter residue may affect wire bondability.